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Logic Synthesis and SOC Prototyping Taraate 1st ed. 2020 edition
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Logic Synthesis and SOC Prototyping
Taraate
This book describes RTL design, synthesis, and timing closure strategies for SOC blocks. It covers high-level RTL design scenarios and challenges for SOC design. The book covers the Synopsys DC, PT commands, and use of them to constraint and to optimize SOC design.
251 pages, XIX, 251 p.
| Media | Boeken Book |
| Vrijgegeven | 30 januari 2020 |
| ISBN13 | 9789811513138 |
| Uitgevers | Springer Verlag, Singapore |
| Pagina's | 251 |
| Afmetingen | 150 × 220 × 20 mm · 626 g |
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