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Digital Logic Design Using Verilog: Coding and RTL Synthesis Vaibbhav Taraate 1st ed. 2016 edition
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Digital Logic Design Using Verilog: Coding and RTL Synthesis
Vaibbhav Taraate
This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. The book also describes advanced RTL design concepts such as low-power design, multiple clock-domain design, and SOC-based design.
402 pages, 41 black & white illustrations, 226 colour illustrations, 15 colour tables, biography
| Media | Boeken Hardcover Book (Boek met harde rug en kaft) |
| Vrijgegeven | 21 mei 2016 |
| ISBN13 | 9788132227892 |
| Uitgevers | Springer, India, Private Ltd |
| Pagina's | 416 |
| Afmetingen | 150 × 220 × 20 mm · 988 g |
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